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The following reference designs are provided “AS IS”. If you have questions, please utilize the on-line forums in seeking help.


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Ultra96 Factory Restore

Restore the Ultra96 microSD Card to its Factory State

PYNQ Framework for Ultra96

Accelerate your designs with PYNQ a Python friendly development framework for the ZYNQ SoC family.  Available now for Ultra96.

PYNQ Quick Start Guide for Ultra96

Video: Setting Up PYNQ On Ultra96

More about PYNQ

Xilinx GitHub for PYNQ

Avnet GitHub for Ultra96

PYNQ SD Card Image for Ultra96 v2018.2 tools

SDSoC Baremetal Platform - Xilinx Matrix Multiply Example


SDSoC PetaLinux Platform - Xilinx Matrix Multiply Example

Ultra96V1 SDSoC Platform v2018.2

Tutorial 01 Build a ZU+ MPSoC Hardware Platform

The first step in creating a design for Zynq UltraScale+ MPSoC is to create the Hardware Platform in Vivado.

Vivado 2018.2 Version

Tutorial 02 First ZU+ Application - Hello World

After creating the hardware platform, the next step is to import that hardware platform into SDK, create a BSP, create an application, and then run it on the board. This tutorial builds on the exported hardware platform from Tutorial 01.

Vivado 2018.2 Version

Tutorial 03 Generate and Run Bare Metal ZU+ Test Applications

After Hello World is working, you can move on to more advanced applications to test the memory and all the peripherals on ZU+.

Vivado 2018.2 Version

Tutorial 04 FSBL and Boot from microSD Card

In this tutorial, we will create the FSBL, and then use it to create a boot image. The boot image will then be stored on the microSD Card. Lastly, instructions are given for booting from the microSD Card.

Vivado 2018.2 Version

Tutorial 01-04 Solutions

Zipped archive of the Vivado hardware platform project and the SDK Applications workspace.

Vivado 2018.2 Version

Accelerated Image Classification via Binary Neural Network

This page provides an introduction to the "Accelerated Image Classification via Binary Neural Network" (short AIC) design example.
This design example demonstrates how moving software implemented neural networks can be dramatically accelerated via Programmable Logic. In this design a Binary Neural Network (BNN) is implemented. Depending on silicon platform an acceleration of 6,000 to 8,000 times is demonstrated. Via the graphical user interface the user can see metrics, images and classification results.

Accelerated Image Classification via Binary Neural Network